If the CRC counter of an interface is high, normally it's a bad sign, but why?

  • If the count is high, what does this mean technically?
  • What can cause this counter to go up?
  • On which layer in the OSI model will this counter react?
  • Thats is perfect answer i was looking for .Most helpful – user6452 Jul 8 '14 at 10:51

The counter is increasing because your frames are being corrupted.

CRC is a polynomial function on the frame which returns a 4B number in Ethernet. It will catch all single bit errors and a good percentage of double bit errors. It is thus meant to ensure that the frame was not corrupted in transit. If your CRC error counter is increasing it means that when your hardware ran the polynomial function on the frame, the result was a 4B number which differed from the 4B number found on the frame itself.

Ethernet frame CRC (FCS) is usually understood to be on OSI layer 2, many people claim it is layer 1 on Ethernet, but that is incorrect (only preamble, SFD and IFG are layer 1 on Ethernet).

I recommend a book called Computer Networks - A systems approach on this and many other subjects. It discusses CRC in-depth around page 92 through 102.

As Daniel pointed out, frames can get corrupted due to several reasons such as: duplex mismatch, faulty cabling and broken hardware. However, some level of CRC errors should be expected and the standard allows up-to 10-12 bit-error-rate on Ethernet (1 bit out of 1012 can flip) and it's acceptable according to the standard.

In copper the signal travels by transferring state between electrons (electrons themselves are not traveling very much) and in fiber the signal travels by the photons reflecting off the walls of the fiber. There is a non-zero chance that the photon will simply change due to heat on the walls or the state of the electrons will flip itself. So even in perfect situations some errors will always happen. It should be known that a bit is not a single photon or single state change of an electron; today you need many photons or electron state changes to express a single bit, so a single incorrect 'state' will not yield an error as a bit is the average state of many of these.

  • 1
    Great info ytti. Maybe add possible causes to your post like duplex mismatch and faulty cabling. – Daniel Dib May 31 '13 at 9:08
  • @ytti thank you for the tip concerning the book :) and the explenation ofc :) – Bulki May 31 '13 at 10:10

Short for cyclic redundancy check, a common technique for detecting data transmission errors. Transmitted messages are divided into predetermined lengths that are divided by a fixed divisor. According to the calculation, the remainder number is appended onto and sent with the message. When the message is received, the computer recalculates the remainder and compares it to the transmitted remainder. If the numbers do not match, an error is detected.

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