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I've worked up a spreadsheet that attempts to model how a 3-layer, nonblocking Clos (fat-tree) topology scales. For my initial case I'm dealing with a non-oversubscribed fabric, so for each switch other than those at the top layer, the (# of uplinks == # of downlinks). I've used "N" as the number of ports required, and "k" as the number of ports on an individual switch (properly called the radix).

The formulas I've gotten to are:

  • top layer is N/K switches
  • middle layer is 2*(N/K) switches
  • the bottom layer is also 2*(N/K) switches

What I'm trying to figure out is whether or not there's a more efficient way to build this out where the bottom two levels aren't the same number of switches. What I think I've gotten myself to is that unless you remove the restriction on nonblocking these layers have to be the same width (meaning the same number of switches)

Can anyone suggest a more efficient way to build/scale/wire this up?

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  • - Your switch radix (i.e., number of ports) will limit the scale of your network. - If you reduce the number of uplinks vs number of downlinks, then you are correct in that it will remove the non-blocking property. In more typical terms, it means that you are oversubscribing the uplinks.
    – data
    Mar 14, 2017 at 15:13
  • Did any answer help you? if so, you should accept the answer so that the question doesn't keep popping up forever, looking for an answer. Alternatively, you could provide and accept your own answer.
    – Ron Maupin ♦
    Aug 11, 2017 at 4:19

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The first and second stage should be identical for a non-blocking design eg: inputs should equal outputs.

Your forumla is missing a couple of components - have a read through the following: http://people.seas.harvard.edu/~jones/cscie129/nu_lectures/lecture11/switching/clos_network/clos_network.html

When relating this back to wiring up real network switches, you will also need to allow for links between the stages potentially using higher capacity interfaces than your input/output ports. Eg: if you have a switch that's 20x 10GE and 6x 40GE, the number of links wired up into the 2nd stage is going to be 4x less than a formula would suggest.

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