Ethernet 1000BASE-T uses a 4D-PAM5 encoding, with 4 lines each transferring 250 Mb/s, thus total of 1000 Mb/s for 1 Gb/s operation.

The descriptions I have found says that 4 of the states in PAM5 is used to transfer the 2 bits for effectively 125 MHz signalling, and the 5th state in PAM5 is used for Forward Error Correction (FEC), but there is no mentioning of frame recovery, like for example made with the 4B5B encoding in 100BASE-TX.

So, if the 5th state in PAM5 of 1000BASE-T is only used for FEC, then how is framing recovered for signalling on the Gigabit Media-Independent Interface (GMII) from the PHY?

  • By frame recovery in 4B5B I'm guessing you mean the fact that there's an end-of-frame delimiter (T/R = 01101 00111) used for 100BASE-TX. Nov 1, 2015 at 3:03
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1 Answer 1


Based on this presentation some of those PAM5 codes (2 byte "SSD" and respectively 4 byte combo "csreset" and "ESD") mark the start and respectively end of frame, similar to how J/K and T/R do the same for 100BASE-TX.

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The 802.3-2005 standard explains how these are coded relative to normal data:

During data encoding, PCS Transmit utilizes a three-state convolutional encoder. The transition from idle or carrier extension to data is signalled by inserting a SSD, and the end of transmission of data is signalled by an ESD. [...] During idle and carrier extension encoding, special code-groups with symbol values restricted to the set {2, 0, –2} are used. These code-groups are also generated using the transmit side-stream scrambler. However, the encoding rules for the idle, SSD, and carrier extend code-groups are different from the encoding rules for data, CSReset, CSExtend, and ESD code-groups. During idle, SSD, and carrier extension, the PCS Transmit function reverses the sign of the transmitted symbols. This allows, at the receiver, sequences of code-groups that represent data, CSReset, CSExtend, and ESD to be easily distinguished from sequences of code-groups that represent SSD, carrier extension, and idle.

CSReset means "Convolutional State Reset" and SSD/ESD mean Start-of-Stream/End-of-Stream Delimiter.

The actual codes are publicly available [for free] as ASCII table 40-1 and table 40-2. The codes are given per byte there, e.g. to send SSD, you send SSD1 and SSD2 in this order.


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