I want to understand how Cisco's CEF and Fast Forward cache packet switching is better than process switching, and I think I might be having trouble understanding Cisco's language.
When they say that a FIB (Forwarding Information Base) or Fast Forward Cache stores the next-hop information and this helps in cutting down time in routing packets, I wonder how slow process switching is in comparison? Is looking up encapsulation method and the exit interface a real burden on the CPU?
All three packet forwarding mechanisms are using time (CPU cycles?) to de-encapsulate the packet and learn its destination address. Up to this point I think they are using the same time. Then a comparison is made to either the FF cache or the FIB or the routing table (process switching) for the exit interface and encapsulation method. The time difference must exist at this stage.
I don't get what the difference is whether you look up the next-hop info from either a cache or RAM? Matter of efficiency? Can someone help me understand?