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Paebbels's user avatar
Paebbels's user avatar
Paebbels's user avatar
  • Member for 8 years, 6 months
  • Last seen more than 5 years ago

Patrick Lehmann studied computer science at Technische Universität Dresden, Germany. His professional career already found its foundation here when he was already teaching as a tutor computer engineering and computer architecture Later on, he specialized in digital design, FPGA technology, and high-speed communication solutions like Serial-ATA, Gigabit Ethernet, or PCI Express. He was sharing his gained knowledge in labs, research articles, and on social platforms. The focus of his research work is was on in-memory database systems, the Serial-ATA protocol implementation, and embedding FPGAs into a Cloud infrastructure.

Since 2017, Patrick Lehmann is working for PLC2 GmbH as a instructor in the topics of VHDL, OSVVM, FPGA technology as well as high-speed communication. As a consultant and “fire fighter” he helps critical projects to bring on track. In cooperation with PLC2 Design GmbH, he is a senior system architect for FPGA-based solutions, team leader in FPGA design projects, and technical project advisor.

Mr. Lehmann is one of the developers and maintainers of the PoC-Library, a platform and vendor independent open source IP core library. He is a contributor to the GHDL project as well, a free VHDL simulator and synthesis tool. In 2016, he started an initiative called "Open Source VHDL Group", whose aim is a free collection of VHDL packages. As a maintainer of more than 40 open source repositories and owner of several GitHub organizations, he is one of circa 20 people worldwide driving the open source community for EDA related tooling.

Furthermore, Mr. Lehmann is very active in the IEEE P1076 "VHDL Analysis and Standardization Group" since 2014. He detailed and wrote major parts of the language changes for the current VHDL-2019 revision. In 2017, he became an IEEE Standards Association member and was announced vice-chair of the IEEE P1076 working group. He managed to register VHDL as an open source pilot project. In cooperation with IEEE SA, the working group successfully publishes all VHDL language packages as the first open-source standard in the history of IEEE. In 2021, the IEEE P1076 working group for VHDL-2025 was approved. One of its main goals is to create a new collaborative and open-source publishing flow at IEEE SA, so the whole standard might become open source.

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