I was explained that in order to support many types of speeds with a switch (i.e. one port is for instance 100 Mb/s and the other is 1 Gb/s), store-and-forward mode is required. I would like to ask why is this option necessary?
On top of that, port buffering was mentioned in particular, leading me to possible misconception that shared memory is not desired or even possible.
If the frames entering the switch are using a 1G port, but are being forwarded out a 100M port, then it's likely that frames are coming in faster than they are going out. So they need to be buffered until they can all be transmitted.
Shared memory and port buffering are not mutually exclusive:
Packets payloads will be stored in shared memory prior to being transmitted (think how inefficient it would be to store a broadcast frame 48 different times in order to flood it out each port).
Port buffering comes into play when multiple packets arrive at the switch from different ingress interfaces, all destined for one (or more) common egress interfaces.
Even if all ports are the same speed switches need to be able to use store and forward as a fallback. Otherwise when the network started to get busy a large number of packets would end up being dropped because their outgoing port was blocked with another transmission.
Regarding speeds if the incoming and outgoing ports are different speeds then the switch must take steps to accomodate that.
If the outgoing port is slower than the incoming port then it can start outgoing trasnmission as soon as it has received the frame headers and determined the destination port but it will end up having to buffer the bulk of the frame.
If the outgoing port is faster than the incoming port then it can't start transmission until it is sure it has received a sufficient proportion of the frame. Since "Ethernet II" frames don't have a length field that practically means wating for the end of packet marker making the switch effectively "store and forward".
As to shared memory verses per port buffers it would be possible to build a pure shared memory based switch but the demands on the shared memory system would be extremely high. The shared memory would have to be able to support multiple simultanious streams of data running at different speeds and writing to different parts of the memory. The total bandwidth of the shared memory would have to be extremely high.
